The code rate of the TCC for 3GPP is 1/3. The data length is between 40 and 5114.
The maximum data rate can be 2 Mbps at 8 iterations or 4 Mbps at 4 iterations.
It takes 4 bit soft input for both the data and the parity symbols. The early
termination mechanism can stop the decoding process once the optimal performance
is achieved. An efficient interleaving process is employed to further improve the
power efficiency. There is no need for external noise power estimation. The compact
design makes it one of the smallest Turbo Convolutional Code on the market.
The resource usage and performance parameters are listed in Table 1 for the TCC
encoder and Table 2 for the TCC decoder. The bit error rate performance of the
implementation is shown in Figure 1 and Figure 2. Figure 1 shows the bit error
rate performance of a length 5114, rate 1/3 code with different number of iterations.
It can be seen that while each iteration improves the performance of the code, the
fifth iteration doesn't improve the performance as much as the first few ones. Figure
2 shows the bit error rate performance of the rate 1/3 code with one iteration for
different code lengths. It can be seen that with code length of 1000 the performance
of the code is almost as good as with code length of 5114.
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Table 1. Resource Usage And Performance Parameters For The TCC Encoder
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| Platform |
CLB Slices |
Block Ram |
18x18 Multipliers |
Clock Speed |
| Virtex II |
561 |
4 |
3 |
125 MHz |
| Spartan III |
568 |
4 |
3 |
105 MHz |
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Table 2. Resource Usage And Performance Parameters For The TCC Decoder
|
| Platform |
CLB Slices |
Block Ram |
18x18 Multipliers |
Clock Speed |
Data Rate |
Sliding Window Length |
Input Resolution |
| Virtex II |
1836 |
18 |
3 |
75 MHz |
2 Mbps (8 Iters) 4 Mbps (4 Iters) |
40 |
4 bit |
| Spartan III |
1865 |
18 |
3 |
60 MHz |
2 Mbps (6 Iters) 4 Mbps (3 Iters) |
40 |
4 bit |
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Figure 1. The bit error rate performance of the Turbo Convolotional Code for 3GPP
with different number of iterations. The code rate is 1/3. The data length is 5114.
|
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Figure 2. The bit error rate performance of the Turbo Convolotional Code for 3GPP
with different data lengths. The code rate is 1/3. The data length is different.
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Availability And Deliverables
The Turbo Convolutional Code for 3GPP is available now. Deliverables include source code in VHDL
or Verilog, netlist file for Xilinx FPGA, testbenches in VHDL or Verilog, and C/C++ source
code for modeling and verification.
Data Sheet
Please use the following link to down load the data sheet.
Please
contact us
for more information.
3GPP Turbo Convolutional Code Encoder
3GPP Turbo Convolutional Code Decoder
FREE DownLoad For Verification
We have designed a FREE testbench netlist for Xilinx Virtex II and Spartan III. It is a full
version of the testbench, including the random number generator, the TCC encoder, the TCC decoder,
and some control logic. An entity declaration in VHDL, a module declaration in Verilog, and
a user guide are also included in the download files. You can use the following link to
download the files and implement the testbench in your own hardware and verify the functionality
and check the performance of our product. To use the free download files, you agree to be bound
by this
Term Of Use.
FREE Download For Virtex II
FREE Download For Spartan III
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